Wireless communication systems, such as the 2nd Generation (2G) (otherwise referred to as Global System for Mobile (GSM) communications and the 3rd Generation (3G) of mobile telephone standards and technology, are well known. An example of such 3G standards and technology is the Universal Mobile Telecommunications System (UMTS), developed by the 3rd Generation Partnership Project (3GPP) (www.3gpp.org).
Typically, wireless communication units, or User Equipment (UE) as they are often referred to in 3G parlance, communicate with a Core Network (CN) of the 3G wireless communication system via a Radio Network Subsystem (RNS). A wireless communication system typically comprises a plurality of radio network subsystems, each radio network subsystem comprising one or more communication cells to which UEs may attach, and thereby connect to the network.
The 3rd generation of wireless communications has been developed for macro-cell mobile phone communications. Such macro cells utilise high power base stations (NodeBs in 3GPP parlance) to communicate with UEs operating within a relatively large coverage area.
Lower power (and therefore smaller coverage area) femto-cells or pico-cells are a recent development within the field of wireless cellular communication systems. Femto-cells or pico-cells (with the term femto-cell being used hereafter to encompass pico-cell or similar) are classified under local area base stations in the 3GPP standard specifications. Femto cells are effectively communication coverage areas supported by low power base stations (otherwise referred to as Access Points (APs)). These cells are able to be piggy-backed onto the more widely used macro-cellular network and support communications to UEs in a restricted, for example ‘in-building’, environment. Typical applications for such femto-cell APs include, by way of example, residential and commercial (e.g. office) locations, ‘hotspots’, etc, whereby an AP can be connected to a core network via, for example, the Internet using a broadband connection or the like. In this manner, femto-cells can be provided in a simple, scalable deployment in specific in-building locations, since the quality of services (voice/data) no longer suffers due to massive attenuation of macro cell transmissions going through concrete walls or metallised glass planes in order to reach the user in-building.
In a femto cell network it is known that there may be a very large number of femto cells compared to the number of macro cells, with femto cells often residing within or overlapping macro cells in the same geographic area.
Often, a Voltage Controlled Temperature Compensated (VCTCXO) crystal Oscillator is used to generate a desired (reference) operating frequency for wireless communication units. Such crystal oscillators have been employed in UE receivers operating in macro cells, and are also proposed to be used in femto cells. Although VCTCXOs are inexpensive, and therefore an attractive frequency reference component for wireless communication unit designers, they are known to suffer from a frequency drift from their quiescent operating frequency, which is dependent upon the age of, and any temperature variations affecting, the VCTCXO.
Local oscillator (LO) frequencies for the radio receiver, transmitter and the sampling clocks for baseband data converters (for example analog-to-digital converters and digital-to-analog converters), are derived from the frequency reference generated by the crystal oscillator. Hence, this frequency drift in the crystal oscillator needs to be carefully controlled; otherwise reference frequency drift will lead to degradation of performance in many aspects of the receiver. Worse still, reference frequency drift may eventually render the receiver incapable of decoding received signals due to frequency drifting outside a receiver ‘lock’ range. Moreover, from a transmission point of view, it is illegal to transmit 3G signals at a frequency error greater than +/−0.1 PPM, as per the 3GPP transmitter specifications for local area base stations (femto cells).
In macro cell communications, base stations, often referred to as NodeBs, are guaranteed to have high frequency stability, as they employ stable, hence expensive, crystal oscillators. The maximum frequency drift specification of macro cells, according to 3rd Generation Partnership Project (3GPP) specifications, is +/−0.05 PPM. Notably, this high accuracy macro cell reference frequency compares favourably to the lower accuracy performance of femto cell VCTCXO crystal oscillators, which are typically in the region of less than +/−10 PPM.
Clearly, it is of paramount importance that a femto cell communication unit receiver is in frequency lock with the most stable, accurate transmitter that it is receiving signals from, in order to correctly decode signals. Furthermore, it is important to achieve this high frequency accuracy before the receiver baseband modem attempts to decode the received channels. A desired frequency accuracy performance before decoding would be to reduce the frequency drift down to +/−0.1 PPM. This process of reducing the frequency drift within the receiver's decoding requirements is termed ‘frequency synchronisation’.
Existing state of the art frequency synchronisation procedures directly re-tune the wireless communication unit's hardware VCTCXO crystal to correct an estimated frequency error, iteratively. Furthermore, it is known that such frequency synchronisation procedures frequency lock to every received individual base station (previously every macro cell NodeB), in turn, in order to select the best frequency to synchronise its operating frequency to.
In femto cells, it is proposed that femto cell APs incorporate a DL (Downlink) receiver radio sub-system, in a similar manner to a UE receiver, in order to wirelessly receive transmissions from other wireless serving communication units, such as NodeBs and other femto cell APs. It is also proposed that a femto cell AP is able to receive transmissions from macro cells, in a manner that is termed Network Listen.
However, in a typical femto cell environment, it is likely that, in addition to macro cells, there will be many other femto cells in the residential neighbourhood. Hence, it is highly probable that the femto cell's downlink (DL) receiver could frequency lock with any number of femto cell and macro cell reference frequency signals. It is not desirable that a femto cell Downlink (DL) receiver synchronises to another femto cell AP, since femto cell APs will typically employ inexpensive, but less stable VCTCXO crystals.
In the field of oscillator designs, a recent development has been the software digital oscillator. The software digital oscillator is implemented as a standard Quadrature Coupled Recursive Oscillator, which is further described in ‘Recursive Discrete-time Sinusoidal Oscillators—IEEE Signal Processing Magazine, May 2003, pages 103-111’. The oscillator topology suggested in the article is illustrated in FIG. 1, and briefly described herein.
The known software digital oscillator, 100, design of FIG. 1 comprises a sinusoid LO generation path, 105, and a cosinusoid LO generation path, 110. Both paths comprise quadrature (IQ) multiplication logic stages 125, which multiply a Sin(φ) 115 or Cos(φ) 120 component with a feedback component of Sin(φ+x) (Q-component) 160 or Cos(φ+x) (I-component) 165, from the output of the LO generation path, as illustrated.
The outputs of quadrature multiplication logic stages 125 are respectively input to a summing stage 130, 135 and either summed (Q-component) or subtracted (I-component), before being input to delay logic 140, 145 and input to an automatic gain control (AGC) function 150, 155. The reference article suggests measuring the AGC power and scaling the oscillator output to a reference power using the AGC function 150, 155 every I/Q oscillator output sample, of the recursive digital software oscillator, thereby maintaining unity gain always in every I/Q oscillator output sample in order to sustain the oscillator output amplitude. The outputs from the respective AGC functions 150, 155 provide the Q-component and I-component of the software digital oscillator 100. In addition, the outputs provide a feedback input to the respective quadrature multiplication logic stages 125; thus forming a recursive system.
Although a software-based digital oscillator is attractive in theory, the topology of FIG. 1 cannot always be directly realised in practice, due to the stringent time-constraints in the number of instructions per oscillator output that are available. The number of instructions per oscillator output is dictated by the clock speed and architecture of the associated digital signal processor (DSP), on which the digital oscillator is implemented.
The number of instructions per oscillator output in a 3GPP wide band code division multiple access (WCDMA) receiver is defined by its rake receiver operating requirements. A typical WCDMA receiver employs a rake receiver, which essentially has a set of ‘fingers’. Each finger independently demodulates a specific propagation path in the received multi-path signal from a cell. The fingers are finally combined together to provide a composite signal comprising a higher Signal-to-Noise (S/N) ratio than that of each of the individual multi-path components.
Practical rake receivers operate on over-sampled data rates (i.e., the rate at which the input signal is sampled and represented to the input of the finger) where the over-sampling rates range from approximately ‘2’ to ‘8’. Typical rake receivers operate on 4-times over-sampled data, as a trade-off between over-sampling rate and performance/receiver complexity.
A higher over-sampled input data rate at the rake receiver input implies that a more accurate alignment of the finger's sampling point with the received signal path can be achieved, thus improving the receiver performance. At a WCDMA chip rate of 3.84 MHz, a 4-times over-sampling rate translates to an input over-sampled IQ data rate of 15.36 MSPS (Million Samples Per Second). This, in turn, implies that the oscillator has to be fast enough to generate and output ‘I’ & ‘Q’ de-rotation waveforms at 15.36 million samples per second as well. The WCDMA downlink frequency range is 2.110 GHz to 2.170 GHz. Hence, at a maximum downlink carrier frequency of 2.170 GHz, a +/−10 ppm frequency drift (typical in femto cell VCTCXO crystal oscillator) translates to +/−21.70 KHz frequency drift. Thus, the processing rate also needs to be applied over the frequency range of +/−211 Hz to +/−21.70 KHz, as established earlier. (Note that +/−211 Hz comes from +/−0.1 PPM, which is the receiver's performance requirement before decoding channels, as was established earlier.)
This fast rate imposes a restriction on the number of instructions (cycles) available for the digital oscillator per output, which in turn is dictated by the DSP used in the design. Practical DSPs have precluded the use of software digital quadrature recursive oscillator designs of the type illustrated in FIG. 1.
Therefore, in existing state of the art oscillator designs for 3GPP DL receivers (for example, User Equipment (UEs) or femto cell APs), software digital oscillators of the type of FIG. 1 have been unsuitable and unused. Instead, in 3GPP DL receivers, the receiver's hardware crystal is directly pulled to correct the frequency error and synchronise to macro-cells.
Thus, there exists a need for a method and apparatus for frequency synchronisation in a cellular communication unit, particularly one for a 3GPP femto cell using inexpensive VCTCXO crystal oscillator in a 3GPP combined femto cell/macro cell communication network, which aims to address at least some of the shortcomings of past and present techniques and/or mechanisms.